1. Field of the Invention
The present invention relates to a transistor threshold extraction method and to a transistor threshold extraction circuit.
2. Background of the Invention
Threshold extraction finds various applications in the field of the characterization of electronic devices, level translation, absolute or relative temperature measurement, temperature compensation, and compensation of process parameters. A specific panorama of this subject is set forth in the article by Zhenhua Wang, "Automatic Vt Extractors . . . and Their Applications", in IEEE Journal of Solid-State Circuits, Vol. 27 No. 9 pages 1277-1285, September 1992.
This article discloses the circuit shown in FIG. 1. The circuit of FIG. 1 comprises two n-channel MOS transistors M1 and M2 having the same threshold voltage and a current mirror MC having an input terminal IM and an output terminal OM. It has an input IT and an output OT. The source terminals S1 and S2 of the transistors M1 and M2 are connected to a ground terminal GND, their drain terminals D1 and D2 are respectively connected to ethe terminals IM and OM, and their gate terminals G1 and G2 are respectively connected to the input IT and output OT. In addition the gate and drain terminals of the transistor M2 are connected together.
The potential at the output OT is given by a linear combination of the input potential IT and the threshold voltage of the transistors M1 and M2. This depends only on geometric parameters with the exception however of the potential at the input IT.
The Wang article discussed above proposes a variation of the circuit of FIG. 1 by selecting the W:L, ratio of transistor M1 equal to one fourth of W:L ratio of the transistor M2 and connecting to the output of the FIG. 1 circuit an amplifier with a gain of two, to provide at the output a potential equal to the sum of the potential at the input IT and the threshold voltage of the transistors M1 and M2.
The circuits described above have an advantage of extracting the threshold voltage of the transistors free from body effect since the source terminals of the n-channel transistors are connected to the substrate (in the case of N-well process) or to the process well (in the case of P-well process). Other circuits require separate wells in which to insert the transistors to be free of the body effect, or have a limitation that the threshold extraction is limited to transistors of a single polarity.
The purpose of the present invention is to supply an alternative circuit to that of the prior art.